Sungyoung Lee
Hi all, welcome! Thanks for visiting.
I work on improving the efficiency of expressive machine learning (ML) algorithms.
Most major breakthroughs in ML come from expressive distributional modeling.
Still, we should avoid using a nuclear bomb to catch a fly!
Aiming for maximum capability with minimal computation is what I feel fun and important.
Check out About for more details!
Blog
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[FAN] Efficiency vs. Expressivity in Offline Reinforcement Learning
How to efficiently leverage flow policies and distributional critics in offline reinforcement learning.
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[DICE] Efficient Yet General Pretraining for Integrated Circuits
How transistor-level graph contrastive pretraining improves generalization for ICs.
Research Overview
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AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
Yao Lai, Souradip Poddar, Sungyoung Lee, Guojin Chen, Mengkang Hu, Bei Yu, Ping Luo, David Z. Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems (TCAD), 2026
TL;DR: First training-free multimodal LLM framework for end-to-end analog design, unifying topology generation and sizing with waveform/log feedback.
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PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning
Seunggeun Kim, Ziyi Wang, Sungyoung Lee, Youngmin Oh, Hanqing Zhu, Doyun Kim, David Z. Pan
2025 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2025
TL;DR: Performs Pareto-aware analog sizing with goal-conditioned reinforcement learning for robust trade-offs across process and operating conditions.
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DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining
Sungyoung Lee, Ziyi Wang, Seunggeun Kim, Taekyun Lee, Yao Lai, David Z. Pan
arXiv preprint, 2025
TL;DR: First self-supervised pretrained GNN for device-level circuits; simulation-free graph contrastive pretraining boosts performance on three downstream tasks.
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AnalogCoder: Analog Circuit Design via Training-Free Code Generation
Yao Lai, Sungyoung Lee, Guojin Chen, Souradip Poddar, Mengkang Hu, David Z. Pan, Ping Luo
AAAI Conference on Artificial Intelligence (AAAI) 2025 (Oral)
TL;DR: Training-free LLM agent for analog circuit design using feedback prompts plus a circuit library; high success rate and 25 designed circuits, outperforming GPT-4o.
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Analog Transistor Placement Optimization Considering Nonlinear Spatial Variations
Supriyo Maji, Sungyoung Lee, David Z. Pan
Design, Automation & Test in Europe Conference & Exhibition (DATE) 2024
TL;DR: Simulated annealing transistor placement handles nonlinear spatial variation in analog circuits, beats prior methods, satisfies layout constraints, and improves optimization control.
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A 10-to-12-GHz Dual Loop Quadrature Clock Corrector in 28-nm CMOS Technology
Jung-Woo Sull, Sungyoung Lee, Deog-Kyoon Jeong
37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2022
TL;DR: Dual-loop quadrature clock corrector in Samsung 28-nm CMOS.